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Cmos: Circuit Design, Layout, and Simulation (Ieee Press Series on Microelectronic Systems) (en Inglés)
R. Jacob Baker (Autor)
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John Wiley & Sons Inc
· Tapa Dura
Cmos: Circuit Design, Layout, and Simulation (Ieee Press Series on Microelectronic Systems) (en Inglés) - R. Jacob Baker
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Origen: España
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Se enviará desde nuestra bodega entre el
Miércoles 12 de Junio y el
Jueves 27 de Junio.
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Reseña del libro "Cmos: Circuit Design, Layout, and Simulation (Ieee Press Series on Microelectronic Systems) (en Inglés)"
A revised guide to the theory and implementation of CMOS analog and digital IC design The fourth edition of CMOS: Circuit Design, Layout, and Simulation is an updated guide to the practical design of both analog and digital integrated circuits. The author—a noted expert on the topic—offers a contemporary review of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and switching power supplies. CMOS includes discussions that detail the trade-offs and considerations when designing at the transistor-level. The companion website contains numerous examples for many computer-aided design (CAD) tools. Using the website enables readers to recreate, modify, or simulate the design examples presented throughout the book. In addition, the author includes hundreds of end-of-chapter problems to enhance understanding of the content presented. This newly revised edition: • Provides in-depth coverage of both analog and digital transistor-level design techniques • Discusses the design of phase- and delay-locked loops, mixed-signal circuits, data converters, and circuit noise • Explores real-world process parameters, design rules, and layout examples • Contains a new chapter on Power Electronics Written for students in electrical and computer engineering and professionals in the field, the fourth edition of CMOS: Circuit Design, Layout, and Simulation is a practical guide to understanding analog and digital transistor-level design theory and techniques.
